In this paper, a CMOS output-capacitor-free low-dropout regulator (LDO) is presented in which a capacitor multiplier based on a current-mode amplifier is embedded into the error amplifier to enhance the dynamic specifications to load variations, pole splitting, and simu More
In this paper, a CMOS output-capacitor-free low-dropout regulator (LDO) is presented in which a capacitor multiplier based on a current-mode amplifier is embedded into the error amplifier to enhance the dynamic specifications to load variations, pole splitting, and simultaneously power saving. The proposed LDO topology is designed and simulated in HSPICE in a 0.35 µm CMOS process to provide a 1.8 V output voltage with a 200 mV dropout for a wide range output current between 0-100 mA while its quiescent current is 22 µA. In order to have a fair conclusion, the article reveals a FOM-based comparison with other reported designs.
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