Investigation of the Novel Attributes at AlGaN/GaN HEMT with a P-Layer in the Barrier at Source and Drain Side
Subject Areas : electrical and computer engineering
S. M.
Razavi
1
Seyed-Hamid
Zahiri
2
(University of Birjand)
S. E.
Hosseini
3
(Ferdosi University)
Abstract :
In this work, novel gallium-nitride (GaN) high electron mobility transistor (HEMT) with a p-layer in the barrier at source and drain sides (SD-PL) is reported. Important parameters such as gate-source and gate-drain capacitances, maximum DC trans-conductance (gm), cut off frequency (fT), maximum lateral electric field, breakdown voltage, DC output conductance (go) and saturated drain current of the proposed structure are studied in details using two-dimensional and two-carrier device simulations. The simulation results of the proposed structure are compared with those of the source side p-layer in the barrier (S-PL), drain side p-layer in the barrier (D-PL) and conventional structures. According to the extracted results, the proposed structure improves the gate-source capacitance, maximum gm, cut off frequency and go compared to the D-PL structure. Also this new structure reduces the peak electric field at the gate corner near the drain and consequently increases the breakdown voltage significantly in comparison with the conventional structure. Increasing p-layer length (LP) and thickness (TP) in the SD-PL and S-PL structures, improves the breakdown voltage, gate-source capacitance, gate-drain capacitance and go.
[1] I. Saidi, Y. Cordier, M. Chmielowska, H. Mejri, and H. Maaref, "Thermal effects in AlGaN/GaN/Si high electron mobility transistors," Solid-State Electronics, vol. 61, no. 1, pp. 1-6, Jul. 2011.
[2] M. K. Chattopadhyay and S. Tokekar, "Thermal model for dc characteristics of AlGaN/GaN HEMT including self-heating effect and non-linear polarization," Micro-Electronics J., vol. 39, no. 10, pp. 1181-1188, Feb. 2008.
[3] R. K. Tyagi, A. Ahlawat, M. Pandey, and S. Pandey, "An analytical two-dimensional model for AlGaN/GaN HEMT with polarization effects for high power applications," Microelectronics J., vol. 38, no. 8-9, pp. 877-883, Aug. 2007.
[4] E. J. Miller, "Trap characterization by gate-drain conductance and capacitance dispersion studies of an AlGaN/GaN heterostructure field effect transistor," J. of Applied Physics, vol. 87, no. 11, pp. 8070-8073, Jun. 2000.
[5] M. Juncai, Z. Jincheng, X. Junshuai, L. Zhiyu, L. Ziyang, X. Xiaoyong, M. Xiaohua, and H. Yue, "Characteristics of AlGaN/GaN/AlGaN double heterojunction HEMTs with an improved breakdown voltage," J. of Semiconductors, vol. 33, no. 1, pp. 14002-14006, Dec. 2012.
[6] W. Chong, H. Yunlong, Z. Xuefeng, H. Yue, M. Xiaohua, and Z. Jincheng, "AlGaN/GaNHEMTs with 0.2 µm V-gate recesses for X-band application," J. of Semiconductors, vol. 33, no. 3, pp. 34003-34006, Mar. 2012.
[7] J. Liu, Y. Zhou, J. Zhu, Y. Cai, K. M. Lau, and K. J. Chen, "DC and RF characteristics of AlGaN/GaN/InGaN/GaN double-heterojunction HEMTs," IEEE Trans. Electron Devices, vol. 54, no. 1, pp. 2-10, Jun 2007.
[8] H. Jia, H. Zhang, and Y. Yang, "A novel 4H-SiC MESFET with a L-gate and a partial p-type spacer," Materials Science in Semiconductor Processing, vol. 15, no. 1, pp. 2-5, Sept. 2012.
[9] S. M. Razavi, S. H. Zahiri, and S. E. Hosseini, "A novel AlGaN/GaN HEMT with a p-layer in the barrier," Physica E, vol. 54, no. 1, pp. 24-29, Dec. 2013.
[10] -, ATLAS User's Manual: Device Simulation Software, Silvaco International, Sept. 2005.
[11] S. E. J. Mahabadi, A. A. Orouji, P. Keshavarzi, and H. A. Moghadam, "A new partial SOI-LDMOSFET with a modified buried oxide layer for improving self-heating and breakdown voltage," Semicond. Sci. Technol., vol. 26, no. 9, pp. 95005-950016, Jul. 2011.
[12] A. A. Orouji, S. M. Razavi, S. E. Hosseini, and H. A. Moghadam, "Investigation of the novel attributes in double recessed gate SiC MESFETs at drain side," Semicond. Sci. Technol., vol. 26, no. 11, pp. 115001-115005, Oct. 2011.
[13] M. K. Verma and B. B. Pal, "Analysis of buried gate MESFET under dark and illumination," IEEE Trans. Electron Devices, vol. 48, no. 9, pp. 2138-2142, Sep. 2001.
[14] J. Yang, J. Spann, R. Anderson, and T. Thornton, "High-frequency performance of subthreshold SOI MESFETs," IEEE Trans. Electron Devices, vol. 25, no. 9, pp. 652-654, Nov. 2004.
[15] C. L. Zhu, E. Rusli, C. C. Tin, G. H. Zhang, S. F. Yoon, and J. Ahn, "Improved performance of SiC MESFETs using double-recessed structure," Microelectronic Engineering, vol. 83, no. 1, pp. 92-95, Jun. 2006.
[16] J. Zhang, X. Luo, Z. Li, and B. Zhang, "Improved double-recessed 4H-SiC MESFETs structure with recessed source/drain drift region," Microelectronic Engineering, vol. 84, no. 12, pp. 2888-2891, Dec. 2007.