تولید خودکار آزمون برای مدارهای دیجیتال ترکیبی با بهکارگیری شاخص ردیابی تقریبی مسیر بحرانی با الگوهای موازی
محورهای موضوعی : مهندسی برق و کامپیوترزینب مرادی قیسوندی 1 , آرزو کامران 2 *
1 - دانشكده مهندسي برق و کامپیوتر، دانشگاه رازی، کرمانشاه، ایران
2 - دانشكده مهندسي برق و کامپیوتر، دانشگاه رازی، کرمانشاه، ایران
کلید واژه: شبیهسازی اشکال, تولید خودکار آزمون برای مدارهای دیجیتال, پوشش اشکال, الگوی آزمون, ردگیری تقریبی مسیر بحرانی.,
چکیده مقاله :
در این مطالعه، روشی برای تولید آزمون برای مدارهای دیجیتال ترکیبی ارائه شده است که از شاخص حاصل از روش ردیابی تقریبی مسیر بحرانی برای شناسایی بردارهای آزمون کارا استفاده میکند. نتایج ارزیابیها در مدارهای محک نشان میدهد که شاخص حاصل از این روش تقریبی دارای همبستگی قوی با شاخص دقیق پوشش اشکال است و ضمناً پیچیدگی محاسباتی آن بسیار کمتر از روش دقیق است. با استفاده از روش پیشنهادی، برای تعدادی از مدارهای محک، مجموعه آزمون تولید شده و نتایج آن با سایر روشهای تولید آزمون که از شاخص دقیق پوشش اشکال یا شاخصهای تقریبی دیگر مانند شاخص احتمالاتی یا شاخص حاصل از شبیهسازی با نمونهبرداری اشکال استفاده میکنند، مقایسه شده است. نتایج این مقایسه، کارایی روش آزمون پیشنهادی را از نظر پوشش اشکال، تعداد بردارهای آزمون، و زمان تولید آزمون تأیید میکند.
In this study, we propose a test generation method for combinational digital circuits that leverages an index derived from an approximate critical path tracing technique to identify effective test vectors. Evaluation on benchmark circuits shows that this approximate index strongly correlates with the exact fault coverage index while requiring significantly lower computational effort. Using the proposed method, test sets were generated for several benchmark circuits and compared with other test generation approaches that employ either the exact fault coverage index or alternative approximate indices, such as probabilistic indices or simulation-based indices obtained via fault sampling. The results demonstrate that the proposed method efficiently achieves high fault coverage, reduces the number of test vectors, and lowers test generation time.
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