﻿<?xml version="1.0" encoding="utf-8"?><records><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>1</startPage><endPage>12</endPage><documentType>article</documentType><title language="eng">Finite-Control-Set Model Predictive Control of an Active Front-End Rectifier with Dynamic References and Comparison with MPDPC Method</title><authors><author><name>Ayyoub Keshvari</name><email>ayyoub60234@gmail.com</email><affiliationId>1</affiliationId></author><author><name>Mohammad Reza  Alizadeh Pahlavani</name><email>mr_alizadehp@mut.ac.ir</email><affiliationId>2</affiliationId></author><author><name>Arash Dehestani Kolagar</name><email>a_dehestani@mut.ac.ir</email><affiliationId>3</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Malek Ashtar University of Technology</affiliationName><affiliationName affiliationId="2">دانشگاه صنعتی مالک اشتر</affiliationName><affiliationName affiliationId="3" /></affiliationsList><abstract language="eng">In this paper, a finite-control-set model predictive control method is presented for closed loop control of an active front-end rectifier. The method used has a discrete-time function and does not require any additional modulators. The interesting point in the control algorithm is how to control the dynamic references. The control strategy is able to provide proper references for source active power and DC voltage, without the need for additional control loops. In order to better understand the performance, the proposed control method is compared with the model predictive direct power control (MPDPC) method. The results obtained using Matlab/Simulink software show that the proposed method, while having all the capabilities of the MPDPC method, including proper tracking of active power and DC voltage and low current THD, by removing the PI controller and its related disadvantages, it has better stability and faster transient response.</abstract><fullTextUrl>http://ijece.org/Article/36810</fullTextUrl><keywords><keyword>Model predictive control</keyword><keyword> direct power control</keyword><keyword> dynamic references</keyword><keyword> active front-end</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>13</startPage><endPage>23</endPage><documentType>article</documentType><title language="eng">Regional Power-Aware Routing for Partially-Connected 3D Network-on-Chip</title><authors><author><name>Mitra Moalemnia</name><email>mi_moalemnia96@elec.iust.ac.ir</email><affiliationId>1</affiliationId></author><author><name>HadiShahriar Shahhoseini</name><email>shahhoseini@iust.ac.ir</email><affiliationId>2</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Student</affiliationName><affiliationName affiliationId="2">Iran University of Science and Technology</affiliationName></affiliationsList><abstract language="eng">Network-on-chip provides an efficient communication platform for Systems-on-chip. The static power consumption is an important issue in these networks. Switching the power supply on virtual channels during idle time is a common method for reducing the network power consumption. The traffic load at the network level and non-continuous idle period of virtual channel have caused the sources to be switched on and off continuously, which leads to increase in power consumption and other overheads. This will be more important, in partially connected 3D chip networks in which a limited number of vertical connections has been used. In this paper, a routing algorithm is proposed who employs an appropriate policy for packet distribution, and reduces the load distribution in the network and creates a continuous idle time for the resources, result in suitable power management in the network. In this routing scheme the network is divided to north and south region and some restriction applied in usage of elevators in each region and try to increase the utilization of the used resources as well as the ideal time of low traffic paths. The simulation results, derived by BookSim, show the proposed method improve the network power consumption by 18% to 30% comparing previous algorithms, and the network delay has been reduced by 32%.</abstract><fullTextUrl>http://ijece.org/Article/32611</fullTextUrl><keywords><keyword>Network-on-chip</keyword><keyword> routing algorithm</keyword><keyword> energy management</keyword><keyword> performance evaluation</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>24</startPage><endPage>32</endPage><documentType>article</documentType><title language="eng">Fixed-Time Consensus of Fractional-Order Single Integrator Multi-Agent Systems</title><authors><author><name>Hossein Zamani</name><email>zamani.hossein@modares.ac.ir</email><affiliationId>1</affiliationId></author><author><name>وحيد جوهري مجد</name><email>majd@modares.ac.ir</email><affiliationId>2</affiliationId></author><author><name>Khosro Khandani</name><email>k-khandani@araku.ac.ir</email><affiliationId>3</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Tarbiat Modares University</affiliationName><affiliationName affiliationId="2">Tarbiat Modares University</affiliationName><affiliationName affiliationId="3">Arak University</affiliationName></affiliationsList><abstract language="eng">The problem of consensus in fractional order single-integrator multi-agent systems has been studied in this paper. The effect of memory is considered using the Riemann-Liouville fractional derivative in the dynamics of the agents. In order to achieve convergence among the agents, a fractional order control protocol based on the error signal between neighboring agents is proposed. Using Lyapunov's stability theorem, a Lyapunov function is introduced that shows that the agents converge over a specified settling time and the upper bound of the settling time is obtained. The merit of the proposed bound for the settling time is that it is independent of the initial conditions.  Finally, some simulations are provided to confirm the introduced method.</abstract><fullTextUrl>http://ijece.org/Article/32437</fullTextUrl><keywords><keyword>Fractional-order integrators</keyword><keyword> multi-agent systems</keyword><keyword> consensus</keyword><keyword> fixed-time convergence</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>33</startPage><endPage>41</endPage><documentType>article</documentType><title language="eng">Energy Management of Micro-Grids and Their Harmonic Compensation Through Shunt Active Filter Based on Multi-Agent Systems</title><authors><author><name>Mohammad-Reza Salehi Rad</name><email>m.salehirad2020@gmail.com</email><affiliationId>1</affiliationId></author><author><name>Mohammad Mollaie Emamzadeh</name><email>molaie@uk.ac.ir</email><affiliationId>2</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Shahid Bahonar University of Kerman</affiliationName><affiliationName affiliationId="2">Shahid Bahonar University of Kerman</affiliationName></affiliationsList><abstract language="eng">In this paper, a new energy management strategy is presented by using shunt active power filter (SAPF) in a multi-agent structure. This strategy is applied to a micro-grid connected to the grid and includes the problem of harmonic compensation. By examining the advantages and disadvantages of shunt active power filters and passive filters, as well as their efficiency in the multi-agent structure for power micro-grids, the reason for using shunt active power filters in the proposed method has been determined. Also, the performance of these filters for compensating current harmonics has been compared by examining the FFT results. In the used micro-grid, wind turbine generator and solar cell generator are used as renewable energy sources (RES) and two fuel cells are used to compensate for sudden and unplanned changes in the production power of these two generators. The energy management unit manages the active and inactive state of the two fuel cells according to the production power and consumption power of the micro-grid in such a way that the power exchanged between the micro-grid and the main grid is limited within an acceptable range. The simulation results show that the proposed method using local continuous controllers (in each agent) and central discrete controller (energy management system) has been able to perform well and while providing the required power of the micro-grid, at the same time, it performs the current harmonics compensation issue correctly.</abstract><fullTextUrl>http://ijece.org/Article/33319</fullTextUrl><keywords><keyword>Current harmonic compensation</keyword><keyword> multi-agent system (MAS)</keyword><keyword> shunt active power filter (SAPF)</keyword><keyword> SC-RC-LCL passive filter</keyword><keyword> energy management</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>42</startPage><endPage>50</endPage><documentType>article</documentType><title language="eng">Determination of Available Transfer Capability by Combined Method of Newton-Raphson-Seydel and Holomorphic Load Flow with Improved Matrix Calculations</title><authors><author><name>Mostafa Eidiani</name><email>eidiani@yahoo.com</email><affiliationId>1</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Khorasan Institute of Higher Education</affiliationName></affiliationsList><abstract language="eng">This paper first demonstrates that high direct current lines will undoubtedly be the backbone of the future transmission network. The Newton Raphson Seydel alternating load flow equations are then combined with the direct current line equations. This paper employed matrix techniques to increase the speed of solving problems as the dimensions of the equations get larger. Furthermore, the holomorphic load flow does not require an initial estimate to run the load flow, and if a solution exists, the precise answer is calculated. The initial guess of Newton Raphson Seydel was calculated using this approach. In this paper, we describe a novel approach that can compute the available transfer capability in small and large networks with sufficient accuracy and speed by combining these methods. The simulation in this paper uses five networks: 39 IEEE buses, 118 IEEE buses, 300 IEEE buses, 145 Iowa state buses, and 1153 East Iran buses network. In addition, four approaches were employed for comparison: continuous power flow, the general minimum residual method, Newton Raphson Seydel classical method, and the standard holomorphic power flow method. The results of the simulations suggest that the proposed strategy is acceptable.</abstract><fullTextUrl>http://ijece.org/Article/32166</fullTextUrl><keywords><keyword>Available transfer capability</keyword><keyword> holomorphic load flow</keyword><keyword> Newton-Raphson-Seydel</keyword><keyword> HVDC line</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>51</startPage><endPage>58</endPage><documentType>article</documentType><title language="eng">Integrated Fault Estimation and Fault Tolerant Control Design for Linear Parameter Varying System with Actuator and Sensor Fault</title><authors><author><name>Hooshang Jafari</name><email>hooshang.jafari@modares.ac.ir</email><affiliationId>1</affiliationId></author><author><name>Amin Ramezani</name><email>ramezani@modares.ac.ir</email><affiliationId>2</affiliationId></author><author><name>Mehdi Forouzanfar</name><email>m.forouzanfar@iauahvaz.ac.ir</email><affiliationId>3</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1" /><affiliationName affiliationId="2">Academy Member</affiliationName><affiliationName affiliationId="3">Academy staff</affiliationName></affiliationsList><abstract language="eng">Fault occurrence in real operating systems usually is inevitable and it may lead to performance degradation or failure and requires to be meddled quickly by making appropriate decisions, otherwise, it could cause major catastrophe. This gives rise to strong demands for enhanced fault tolerant control to compensate the destructive effects and increase system reliability and safety in the presence of faults. In this paper, an approach for estimation and control of simultaneous actuator and sensor faults is presented by using integrated design of a fault estimation and fault tolerant control for time-varying linear systems. In this method, an unknown input observer-based fault estimation approach with both state feedback control and sliding mode control was developed to assure the closed-loop system's robust stability via solving a linear matrix inequality formulation. The presented method has been applied to a linear parameter varying system and the simulation results show the effectiveness of this method for fault estimation and system stability.</abstract><fullTextUrl>http://ijece.org/Article/33269</fullTextUrl><keywords><keyword>Fault estimation</keyword><keyword> fault tolerant control</keyword><keyword> linear parameter varying system</keyword><keyword> linear matrix inequality</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>59</startPage><endPage>65</endPage><documentType>article</documentType><title language="eng">Design and Simulation of a Low Power and High-Speed CMOS Double-Tail Comparator</title><authors><author><name>Akbar Heidaritabar</name><email>kbn_hor@yahoo.com</email><affiliationId>1</affiliationId></author><author><name>habib Adarang</name><email>habibadrang@gmail.com</email><affiliationId>2</affiliationId></author><author><name>seyed saleh Ghoreishi</name><email>salehghoreyshi@gmail.com</email><affiliationId>3</affiliationId></author><author><name>Reza Yousefi</name><email>rezshahab@gmail.com</email><affiliationId>4</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Department of Electrical Engineering,Islamic Azad University, Nour Branch</affiliationName><affiliationName affiliationId="2" /><affiliationName affiliationId="3">Islamic Azad University, Nour Branch</affiliationName><affiliationName affiliationId="4">Islamic Azad University, Nour Branch</affiliationName></affiliationsList><abstract language="eng">The need for low power and high-speed ADC pushes for dynamic comparators to reduce power consumption and maximize speed. This paper presents an analysis of delay, speed, and comparator considerations, and analytical expressions are derived. Using the equation expressions, we can understand the design of comparators and make trade-offs. Based on the presented analysis, a new dynamic comparator is proposed by modifying the circuit of the conventional tail comparator for high speed and low power at small supply voltages without complicating the circuit design, resulting in a remarkable reduction in delay time and incremental speed. Simulation results in a 180 nm CMOS technology confirm the analysis results. It is shown that the proposed conventional tail comparator reduces power consumption and increases speed. The simulation results show that the proposed comparator operates up to 2.5GHz with a delay of 69ps and consumes only 329 μW at a supply voltage of 1.2 V and an offset standard deviation of 7.8 mW.</abstract><fullTextUrl>http://ijece.org/Article/33665</fullTextUrl><keywords><keyword>CMOS design</keyword><keyword> high-speed</keyword><keyword> low power</keyword><keyword> double-tail comparator</keyword></keywords></record><record><language>per</language><publisher>  Iranian Research Institute for Electrical Engineering</publisher><journalTitle>فصلنامه مهندسی برق و مهندسی کامپيوتر ايران</journalTitle><issn>16823745</issn><eissn>16823745</eissn><publicationDate>2023-05</publicationDate><volume>21</volume><issue>1</issue><startPage>66</startPage><endPage>70</endPage><documentType>article</documentType><title language="eng">Optimum Design and Full-Wave Analysis of  Broad-Band Metamaterial Absorbers in the  Visible Light Spectrum</title><authors><author><name>Mortaza Nazari</name><email>mortezanazari197@gmail.com</email><affiliationId>1</affiliationId></author><author><name>Amir Habibzadeh-Sharif</name><email>sharif@sut.ac.ir</email><affiliationId>2</affiliationId></author><author><name>Mohammad Eskandari</name><email>mo_eskandari@sut.ac.ir</email><affiliationId>3</affiliationId></author></authors><affiliationsList><affiliationName affiliationId="1">Sahand University of Technology</affiliationName><affiliationName affiliationId="2">Sahand University of Technology</affiliationName><affiliationName affiliationId="3">Sahand University of Technology</affiliationName></affiliationsList><abstract language="eng">In this paper, optimum design, numerical simulation and full-wave analysis of two broad-band metamaterial absorbers have been presented in the infrared, visible light, and ultraviolet frequencies of the sunlight spectrum. These planar absorbers consist of two conductive layers and an intermediate insulating layer. The simulations results obtained by the finite integration technique have shown that performance of the designed absorbers is independent of the incident wave polarization and its elevation and azimuth angles. The proposed absorbers have an absorption of more than 92% in the visible light range. Therefore, these absorbers can be used to harvest the energy of sunlight</abstract><fullTextUrl>http://ijece.org/Article/37222</fullTextUrl><keywords><keyword>Absorber</keyword><keyword> broad-band</keyword><keyword> metamaterial</keyword><keyword> visible light</keyword><keyword> full-wave analysis</keyword></keywords></record></records>