تولید الگوی آزمون خودکار پیشرفته با استفاده از الگوریتم PSO-FAN
سید حمید ظهیری
1
(
دانشكده مهندسي برق و كامپيوتر، دانشگاه بیرجند، بیرجند، ایران
)
احسان حق پرست
2
(
دانشکده مهندسی برق و کامپیوتر, دانشگاه بیرجند, بیرجند, ایران
)
ابوالفضل بیجاری
3
(
دانشكده مهندسي برق و كامپيوتر، دانشگاه بیرجند، بیرجند، ایران
)
کلید واژه: تولید خودکار الگوی آزمون, بهینه سازی, مدارات VLSI, الگوریتم های فراابتکاری, الگوریتم FAN,
چکیده مقاله :
حوزه آزمایش مدارهای یکپارچه با مقیاس بسیار بزرگ (VLSI) در سالهای اخیر پیشرفتهای قابل توجهی در روشهای تشخیص خطا تجربه کرده است، به طوری که این پیشرفتها در کاربردهای پیچیده اهمیت فراوانی یافتهاند. هرچند که روشهای سنتی برای شناسایی مدارهای سالم و معیوب کارآمد هستند، اما معمولاً در تشخیص دقیق انواع مختلف خطا محدودیتهایی دارند. این مقاله به بررسی پیادهسازی یک الگوریتم بهینهسازی شده به نام FAN (الگوریتم تولید تست مبتنی بر خروجی) میپردازد که با استفاده از تکنیک بهینهسازی ازدحام ذرات (PSO) بر روی مدارهای معیاری ISCAS'89 انجام شده است. نتایج حاصل از این مطالعه نشاندهنده بهبود در پوشش خطا و افزایش دقت تشخیص میباشد. به علاوه، این بهینهسازی منجر به کاهش تعداد بردارهای آزمایشی مورد نیاز گردیده است که در نتیجه کارایی آزمایش را در شرایط تولید با حجم بالا افزایش میدهد. این تحقیق بر اهمیت توسعه معیارهای تشخیصی به منظور درک بهتر عیوب مدار تأکید میکند و بهکارگیری تکنیکهای طراحی که قابلیت آزمایش را تقویت کند، پیشنهاد مینماید. استفاده از PSO در الگوریتم FAN، نشاندهنده پتانسیل بالای این روش در فرآیند تولید تست است و موجب برقراری تعادلی مناسب بین دقت، پیچیدگی و کارایی عملیاتی میشود.
چکیده انگلیسی :
The domain of Very Large Scale Integrated (VLSI) circuit testing has experienced advancements in methodologies for fault detection, which are crucial for addressing the complexities of modern applications. Traditional testing techniques frequently fall short in achieving precise fault localization, highlighting the necessity for the development of enhanced methodologies. This paper endeavors to investigate the implementation of an optimized test generation algorithm aimed at improving testing efficiency and increasing fault coverage. In this study, we utilized a (PSO)-enhanced FAN (fan-out-oriented algorithm) applied to ISCAS'89 benchmark circuits. The optimization process involved refining the decision trees utilized in the FAN algorithm through a rigorously defined cost function, which strikes a balance between accuracy, complexity, and operational efficiency. The results indicate improvement in both fault coverage and detection efficiency. Furthermore, the optimization process resulted in a reduction of required test vectors, thereby enhancing testing efficiency, particularly in high-volume production environments. The study also introduces the development of diagnostic metrics that provide deeper insights into circuit failures and proposes design-for-testability techniques to improve reliability. The integration of PSO within the FAN algorithm not only facilitates the generation of robust test solutions but also produces high-quality test vectors.
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