بررسی تأثیر ریزدانگی در طراحی واحدهای قابل بازپیکربندی حساب دهدهی
محورهای موضوعی : مهندسی برق و کامپیوترسمانه امامی 1 , مهدي صدیقی 2 *
1 - دانشگاه صنعتی امیرکبیر
2 - دانشگاه صنعتي اميركبير
کلید واژه: حساب کامپیوتری سخت‌افزارهای دهدهی واحدهای قابل بازپیکربندی ریزدانگی,
چکیده مقاله :
امروزه استفاده از حساب دهدهی در بسیاری از کاربردها نظیر برنامه‌های مالی مورد توجه قرار گرفته است. شاید بتوان مهم‌ترین عامل تأثیرگذار در این زمینه را نیاز به دقت بیشتر در نمایش اعداد در این کاربردها دانست. در دهه‌های اخیر، مطالعات گسترده‌ای در زمینه طراحی سخت‌افزارهای حسابی دهدهی انجام گرفته که اغلب آنها طراحی‌های خاص‌منظوره و برخی نیز با در نظر گرفتن قابلیت بازپیکربندی بوده‌اند. اما تاکنون تحقیقی بر روی پارامترهای تأثیرگذار در طراحی سخت‌افزارهای قابل بازپیکربندی دهدهی از جمله سطح ریزدانگی و انعطاف‌پذیری آنها انجام نشده است. بررسی‌های ما نشان می‌دهد برای جمع‌کننده‌های دهدهی قابل بازپیکربندی، ریزدانگی سطح بیت مناسب نبوده و بهتر است برای این واحدها، ریزدانگی را در سطح یک یا حتی چند رقم دهدهی افزایش داد. این افزایش سطح ریزدانگی، منجر به حدود 12% بهبود در مساحت و 4/13% بهبود در توان مصرفی شده است. اما بر خلاف جمع‌کننده‌ها با افزایش ریزدانگی در واحدهای مورد نیاز ضرب‌کننده‌های دهدهی، مساحت و توان مصرفی حدود 75% افزایش می‌یابد.
Recently, decimal arithmetic has received renewed attention in certain application domains such as financial computations. This is mostly due to the demand for more accurate decimal number representation and calculation in those applications. While decimal arithmetic may be implemented in software and hardware, the latter form offers higher speeds and better performance. Traditionally, hardware decimal units have been designed as application-specific specialized hardware modules. However, emerging designs have come with some degree of reconfigurablility. But there is no research on the effects of reconfigurability parameters, such as granularity and degree of flexibility, on the overall characteristics of decimal hardware modules .In this paper, it will be shown that bit-level granularity is not suitable for decimal reconfigurable adders. Instead, digit-level granularity will lead to superior designs. The synthesis results indicate that increasing granularity level provides an area improvement of %12 and power improvement of %13.4. Unlike adders, increasing the granularity of decimal multipliers has an adverse effect on their quality and may cause up to %75 increase in their area and power consumption.
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